Projects
At any given time the DRACO lab has several active research projects as well as open research or senior design project ideas. Interested in contributing to a project (individually or as part of senior design)? Contact Dr. Mike and include details on who you are, what you would like to work on, and why.
Using techniques common in malware detection evasion create encrypted components that perform standard operations with a constantly changing key.
Using techniques common in malware detection evasion create encrypted components that perform standard operations with a constantly changing key.
Create a block that based on orientation and manipulations performs one of several fundamental operations. When blocks are placed together they form more complex actions. Blocks should be ultra low-power and cost under five dollar per unit. End product should contain at least 25 blocks. See results from V1 completed by PDX Senior Capstone team circa 2015 and V2 completed by UCF 2024 team.
Create a data collection platform that allows for basic environmental data collection for at least three different properties (e.g., temperature, weight/pressure, brightness). Trading off sensor accuracy for simplicity is critical. Platform should allow end user to input the model that converts raw data measurements into known units. See results from V1 completed by PDX Senior Capstone team circa 2015 and V2 completed by UCF 2024 team.
Develop a 2^n x 2^n Grid of RGBW+ LEDs that is fed from the simulation output of a cycle/turn-based multi-agent simulator. Enable connectable components to increase the grid-size. Basic version should feature fixed 3D printed topology with each unit square being illuminated via an RGB+ led - stretch goal should feature pneumatically controlled tube structures and a flexible membrane.
Create a co-processor unit that detects WiFi jamming activities and then broadcasts and establishes an audible frequency link between mesh of devices.
Create a FPGA-based system that can generate and test memristors. The system should be able to generate a pattern, write it to a memristor, read the pattern back, and compare it to the original pattern.
This research project focuses on using Formal Verification, specifically Formal Equivalence Checking, to verify the equivalence(s) of two RISC-V processors. The goal is to compare the behavior of an already verified RISC-V processor with an unverified one using mathematical proofs, identifying, and addressing any discrepancies.
This research project focuses on understanding the security implications of memristor devices. The goal is to identify potential vulnerabilities in memristor devices and develop countermeasures to mitigate these vulnerabilities.
This research project focuses on detecting hardware trojans using side channel analysis and machine learning. The goal is to develop a methodology to detect hardware trojans using side channel analysis and evaluate the effectiveness of the methodology on different hardware trojans.
This research project focuses on detecting AI workloads using side channel analysis. The goal is to develop a methodology to detect AI workloads using side channel analysis and evaluate the effectiveness of the methodology on different AI workloads.